Current Research Projects

  • Extension of the ACM MOSFET model for RF design
  • Design techniques for analog/digital CMOS circuits (sponsored by CNPq)
  • Analog design and reuse methodology for advanced CMOS technologies (sponsored by CNPq)
  • NAMITEC National Institute of Science and Technology  (sponsored by CNPq)
The NAMITEC National Institute of Science and Technology is a collaboration network which aims at advancing the research and development of intelligent micro- and nano- electromechanical systems for use in sensor networks and embedded and self-adjusted systems, among others.
We are contributing with  design  of low-power analog and  RF integrated circuits.
  • Low-power current based class D amplifier (Sponsored by CNPq)

Class D amplifiers are the right choice for portable audio systems, related to its practical efficiency between 80-90%, maximizing the battery durability, consequently the device autonomy. However, the THD of the audio signal is greater than the obtained by classical class AB amplifiers. This work focuses on the implementation of a class D amplifier, using a PWM current mode topology, with a 90% efficiency, 1% THD, 2mW output power and a 1 V power supply, which constitute a set of specifications appropriate to integrated circuits for hearing aid devices.

 

  • MOSFET-only programmable signal conditioners

  • Low voltage sub-nano current references

  • MOSFET radiation sensor

This project is composed of two phases. The first phase focuses on the characterization, parameter extraction and modeling of a 0.35um CMOS technology, including the effect of stress (Negative Bias Temperature Instability (NBTI) and Hot Carrier Injection (HCI)) and exposure to radiation. The second phase is the design of a RADFET (Radiation-sensing field-effect transistor) using a standard CMOS technology.

  • Circuit conditioner for energy scavenging  systems

The first stage in an energy harvesting circuit is an AC–DC rectifier The rectifier employs a voltage multiplier to generate a DC voltage appropriate to the operation of the electronic circuitry. The voltage multiplier has been developed with components available in conventional IC technologies.

Past Research Projects

.

  • MOSFET model for SMASH mixed-mode simulator (sponsored by Dolphin Integration, Meylan, France)

  • Instituto do Milênio Systems on chip, microsystems and nanotechnologies (sponsored by CNPq)
  • ACM - The MOSFET Advanced Compact Model (sponsored by CNPq and CAPES)

ACM is a one-equation charge-based physical model continuously valid in all MOSFET operation regions. The ACM model allows the designer to optimize the transistor's dimension and operation point in analog designs, where low-power consumption is fundamental. Currently, the ACM model is implemented in the SMASH circuit simulator.

  • Noise modeling

We developed simple physics-based MOSFET noise models, valid over the linear, saturation, and subthreshold operating regions using the inversion level concept and consistent with the MOSFET series-parallel associations.
Due to the simple but still accurate model formulas, they are very useful for hand analysis. The proportionality between the flicker noise corner frequency and the transistor transition frequency was proved and experimentally verified under a wide range of bias conditions.

  • MOSFET mismatch modeling

Recently we developed a compact model for MOS transistor mismatch valid for any operating condition, from weak to strong inversion, from the linear to the saturation region. The mismatch model uses the carrier number fluctuation theory to account for the effects of local doping fluctuations along with an accurate and compact DC MOSFET model, allowing the assessment of mismatch from process and geometric parameters. Experimental results from a set of transistors integrated on a 0.35 ?m technology confirmed the accuracy of our mismatch model under various bias conditions.

  • MOSVIEW - a ACM based CAD tool

We built MOSVIEW, a CAD tool based on the ACM model to assist analog circuit designers in finding graphically the design space of a circuit as function of a specification set such as gain-bandwidth product

  • 2 nW /1.1-V self-biased current reference

We developed an ultra-low-power self-biased 400-pA current source designed under a methodology based on the inversion level concept.

  • Pico-A/V range CMOS transconductors using series-parallel current division

We built a transconductor equivalent to a 30 G? resistor using a simple design methodology based on the ACM MOSFET model. The procedure is useful for designing very small transconductors with extended linear range through the use of series-parallel current current.

  • Building blocks for ultra low-power devices

We designed some circuits for use in ultra-low power systems such as OTA-C low-power sensor conditioners for implantable systems, switched MOSFET low-voltage operational amplifiers and filters and ultra low-power CMOS logic circuits using Body-Bias Compensation Technique operating on the subthreshold condition.